When I select CLKFX in the Clocking Wizard, with 100 MHz input and 300 MHz CLKFX, the output lists the following DCM frequency range (-11 speed grade):
Fin (Mhz) Fout(Mhz)
High : 120-315 160-315
The frequency range of the input clock seems too restricted. Is this correct?
Please refer to the Virtex-4 Data Sheet for the most current timing specification:
Currently, the correct range for CLKIN and CLKFX, in high frequency mode, is as follows:
High : 50-315 160-315
In the cases where the CLKIN frequency overlaps between High and Low DFS frequency mode, the Clocking Wizard is not checking the frequency range correctly. This issue will be fixed in the ISE 7.1i.
To work around this issue, enter a frequency outside the overlapping frequency to generate the HDL file. In the HDL file, update the CLKIN_PERIOD, CLKFX_MULTIPLY, CLKFX_DIVIDE, and DFS_FREQUENCY_MODE attribute values appropriately.