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AR# 19688

6.2i BitGen - How do I make the Done pin stay Low after configuration so I can load my user application data from the PROM into the FPGA for processor use?

Description

General Description: 

How do I make the Done pin stay Low after configuration so I can load my user application data from the PROM into the FPGA for processor use?

Solution

To keep Done Low, set DONE_Cycle:Keep when generating the bit file with BitGen. This setting will keep DONE low even after successful configuration. 

 

Other cautions should also be taken if Done is set to Keep.  

- CCLK should be wired to user I/O so that you can drive the CCLK to clock the data out of the PROM.  

- The MCS/HEX file should contain user data in addition to the bitstream. For more information on appending user data, see (Xilinx XAPP694): "Reading User Data from Configuration PROMs." 

- The BitGen Persist option should not be used as SelectMap pins must be used as user I/Os in order to retrieve data from PROM. You are responsible for developing IP to read data from PROM.

AR# 19688
Date Created 09/03/2007
Last Updated 05/16/2014
Status Archive
Type General Article