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AR# 19858 6.3i UniSim, Simulation - The RDY signal toggles after reset on the IDELAYCTRL module

Keywords: UniSim, simulation, ModelSim, NC-VHDL, IDELAYCTRL, RDY, Virtex-4, reset, toggle

Urgency: Standard

General Description:
After the reset signal is toggled, the RDY output of the IDELAYCTRL module toggles for the duration of the simulation.

This problem has been fixed in the latest 6.3i Service Pack available at:
http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 6.3i Service Pack 1.
AR# 19858
Date Created 09/03/2007
Last Updated 11/18/2008
Status Archive
Type
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