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AR# 1989

FPGA: Input/Output pin levels on various family of devices.

Description


XC3000(L), XC4000(E/L/EX/XL), XC5200(L)



Are the I/O pins CMOS or TTL?

Solution


Following are the I/O pin levels for Xilinx FPGA devices.

These apply to all the user I/O pins as well as dedicated pins.



Family Inputs Outputs

----------------------------------------------

XC3100A selectable always CMOS

XC3100L CMOS=TTL CMOS=TTL



XC4000E selectable selectable

XC4000L CMOS=TTL CMOS=TTL



XC4000EX selectable selectable

XC4000XL CMOS=TTL CMOS=TTL



XC5200 selectable CMOS

XC5200L CMOS=TTL CMOS=TTL



For 5-V devices, selectable means the user can globally

configure for either TTL or CMOS input thresholds or output levels using Makebits options. The two global selections of input threshold and output levels are independent of each other .



For 3.3-V devices, CMOS=TTL input thresholds mean that the

input threshold is at 50% of Vcc, typical for CMOS, but this voltage is also very close to the traditional TTL input threshold of 1.3 to 1.4 V.



For 3.3-V devices, CMOS=TTL output levels mean that the outputs pull all the way to the positive rail, typical of CMOS, but this voltage is also very close to a traditional TTL output level 0f 3.5 V.
AR# 1989
Date Created 08/31/2007
Last Updated 04/12/2011
Status Archive
Type General Article