We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 19933

6.3i PACE/Floorplanner Virtex-4 - Area constraints cannot be placed on the top/bottom edge


Keywords: group, place, package, die, device

Urgency: Standard

General Description:
When I try to place an area constraint or area group at the top or bottom edge of any Virtex-4 package/device, PACE and Floorplanner do not allow it. The border of the area group snaps to one slice before the top or bottom edge. When is this going to be fixed?


To work around this issue, manually modify the UCF to include the extra "Y" value so the area group will include the extra slice row. Add or subtract the current "Y" value in the RANGE constraint for the extra slice on the top or bottom, respectively.

This issue is scheduled to be fixed in the next major software release.
AR# 19933
Date Created 09/03/2004
Last Updated 03/27/2007
Status Archive
Type General Article