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AR# 19968

6.3 BitGen - "ERROR:DesignRules:326 - Blockcheck: Dangling PPC405_ADV input"

Description

Keywords: EDK, BitGen, Error, Virtex4, Virtex-4, Virtex 4, PPC, PowerPC

Urgency: Standard

General Description:
Running BitGen on some Virtex-4 designs will result in the following error:

DRC also gives following ERRORS:

"ERROR:DesignRules:326 - Blockcheck: Dangling PPC405_ADV input.
PPC405_ADV of
comp PPC_CORE is configured to use pin TSTSIGASKETI0, but pin
TSTSIGASKETI0
is not connected.
ERROR:DesignRules:326 - Blockcheck: Dangling PPC405_ADV input.
PPC405_ADV of
comp PPC_CORE is configured to use pin but pin
TSTC405ISOCMXLTVALIDI is not connected."

Solution

In order to resolve this issue, the "bitgen.ut" file in the "etc" directory must be modified.

Open the "bitgen.ut" file and add the "-d" option. This will disable DRCs and all the bit file to be created.
AR# 19968
Date Created 09/13/2004
Last Updated 04/30/2007
Status Archive
Type General Article