AR #19999 - LogiCORE SPI-4.2 (POS-PHY L4) - BitGen "ERROR:Bitgen:169 - This design contains one or more evaluation cores for which bitstream generation is not supported"
LogiCORE SPI-4.2 (POS-PHY L4) - BitGen "ERROR:Bitgen:169 - This design contains one or more evaluation cores for which bitstream generation is not supported"
| AR# | 19999 |
| Part | Coregen POS PHY Level 4 |
| Last Modified | 2005-08-30 00:00:00.0 |
| Status | Active |
| Keywords | CORE Generator, COREGen, IP, update, PL4, licensing, simulation, evaluation, lite |
Description
Keywords: CORE Generator, COREGen, IP, update, PL4, licensing, simulation, evaluation, lite
Urgency: Standard
General Description:
When I run implementation on a design with SPI4.2, I receive the following BitGen error:
"ERROR:Bitgen:169 - This design contains one or more evaluation cores for which bitstream generation is not supported."
Solution
This error indicates that the SPI4.2 Core was generated with a simulation-only license. These generated SPI4.2 files only allow you to implement your design through the place and route tool, which allows you to generate the back-annotated files for functional or timing simulation. The SPI4.2 files will not allow you to generate a bitstream file for programming a device.For more information, see the "Obtaining Your License" section of the SPI4.2 User Guide, located in your <spi4.2_comp_name>\doc\ directory.
In order to generate the bitstream and use it on your system, you will need to obtain and install a full-featured license.