In 6.3 or 7.1 System Generator for DSP, why do I receive the following error when opening my incremental netlist System Generator Design in ISE Project Navigator?
"ERROR:16 - conv_pkg.vhd Line 40. Circular hierarchy reference found. Breaking cycle at module 'conv_pkg'."
This is a known problem.
There are two ways to work around this issue:
1. The easiest way to avoid the problem is to not use incremental netlisting.
2. You can force System Generator for DSP to produce "strict" names (i.e., names that do not use extended VHDL syntax). In System Generator for DSP 6.3 or 7.1, you can set the following global variable that will allow you to turn off the enhanced VHDL naming.
At the MATLAB console, type:
>> global xlUseStrictNames
>> xlUseStrictNames = 1
This issue has been resolvedin System Generator for DSP 8.1.