What are the "Input Only" pins listed in some of the smaller CoolRunner-II device data sheets? They are not associated with any of the devices macrocells; are there any limitations for these pins?
In the CPLD architecture, each output must be driven by a macrocell. For these small devices, they are very limited in macrocells. For example, the 32 macrocell CoolRunner-II CPLD can only have 32 outputs. Some of the larger packages that it is placed in have remaining unused pins after assigning the 32 I/O, VCC, GND, and VCCIO pins.
Consequently, these small devices were designed with extra input pads so that some of these extra pins can be used as input only, since they do not require macrocells. There are no limitations for these pins other than they can only be used as inputs.