I receive incorrect PAR/Timing Analyzer warnings about the CLKFX min/max frequencies when the target device is Spartan-3:
"WARNING:Timing:2798 - The output clock CLKFX_BUF from DCM DCM_INST has a period (frequency) specification of 8000 ps (125.00 Mhz). This violates the minimum period (maximum frequency) of 33330 ps (30.00 Mhz)."
"WARNING:Timing:2799 - The output clock CLKFX_BUF from DCM DCM_INST has a period (frequency) specification of 8000 ps (125.00 Mhz). This violates the maximum period (minimum frequency) of 4761 ps (210.04 Mhz)."
In the above example, 125 MHz is in the minimum to maximum frequency range.
You can safely ignore this warning as long as your CLKFX output frequency is within the valid range. For more information on valid frequency ranges, see the Spartan-3 FPGA DC and Switching Characteristics Data Sheet at:
Spartan-3 appears to be the only device affected by this warning message.