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AR# 20581

LogiCORE Reed-Solomon Encoder core - How is latency through the core calculated?


Keywords: Reed Solomon Encoder, core, forward error correction, latency

Urgency: Standard

General Description:
How is latency through the core calculated? The behavioral model appears to have latency of (2) which should not be possible. The minimum latency for the core is 2 + number of channels which is (1) for my application.


The output of the reed solomon encoder changes immediately following the (third) valid (ie ce high) clock edge after the data is input. So from the time the first data is input to din the data out will be present after (three) valid clocks with ce high. This can appear as though it occurs on the same edge as the (third) data is input if the simulation is not zoomed in sufficiently.

The values in paranthesis depend on the customer's application and should be scaled accordingly.

Please See (Xilinx Answer 30177) for a detailed list of LogiCORE Reed Solomon Encoder Release Notes and Known Issues.
AR# 20581
Date Created 01/07/2005
Last Updated 05/13/2009
Status Archive
Type General Article