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AR# 20724

Spartan-3/-3E/-3A, DCM - What is the reset requirement for the DCM?

Description

What is the reset requirement for the Spartan-3/-3E/-3A DCM?

Solution

The reset input must be asserted at least 3 valid CLKIN cycles.

For more information on Spartan-3/-3E/-3A DCM functionality, see the Spartan-3 Generation FPGA User Guide at:

http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=User+Guides
Choose FPGA Device Families -> Spartan-3/3L -> "Spartan-3 Generation FPGA User Guide" -- (UG331)

For more information on Spartan-3/-3E/-3A DCM specifications, see the DC and Switching Characteristic section of the Data Sheets located at:

Spartan-3:

http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp
Choose FPGA Device Families -> Spartan-3/3L -> "Spartan-3 Complete Data Sheet (All four modules)" -- (DS099)

Spartan-3E:

http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp
Choose FPGA Device Families -> Spartan-3E -> "Spartan-3E Complete Data Sheet (All four modules) -- (DS312)

Spartan-3A:

http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp
Choose FPGA Device Families -> Spartan-3A -> "Spartan-3A FPGA Family Data Sheet"--(DS529)

AR# 20724
Date Created 09/04/2007
Last Updated 02/19/2013
Status Active
Type General Article