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AR# 2080

SYNOPSYS 3.x: Set_max_delay attribute is not passed on to .sxnf

Description

Keywords: FPGA Compiler, set_false_delay, set_max_delay, constraints, replace_fpga, timing

Urgency: Standard

General Description:
While attempting to add timing specifications in the Synopsys environment, users may realize
that the specifications "set_max_delay" and "set_false_path" do not get passed on (in the
form of C2S, P2S, C2P specs) to the .sxnf file. This is due to the command "replace_fpga",
which may change instance names of some of the registers.

Solution

1

Execute the command twice; once before "compile" (for Synopsys), and once after
"replace_fpga" (for XACT). You will need to verify the instance name of your flops after
"replace_fpga".

To list out the instance name of you flops, you can run "all_registers" (Synopsys 3.3b or
newer) at the top-level after executing "replace_fpga".

2

Using the Xilinx-supplied Perl scripts Addtnm and Maketnm instead of Synopsys constraints
is an alternative. See (Xilinx Solution 1016) for more information.



AR# 2080
Date Created 04/04/1997
Last Updated 03/19/2000
Status Archive
Type General Article