We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 20828

13.1 Constraints - How can I set the jitter for CLK0 and CLKFX separately (uncertainty)? (INPUT_JITTER/SYSTEM_JITTER)


When I use CLKFX to drive a system, the clock uncertainty (as used by the Timing Analyzer) is zero if the input clock jitter is set to zero. Conversely, when I set the input clock jitter to some value, this jitter value seems to be propagated to the respective CLKFX constraint.

This makes it slightly difficult if I want to use both CLK0 and CLKFX; even if I know the jitters of both, I cannot set them separately.


The tool does not compute the clock jitter automatically. Currently, the tool does not support the functionality of calculating the DCM discrete jitter and adding it to the timing analysis. The reason for this is because the devices currently available are not characterized for this function. The first device thatused this characterizationwas the Virtex-4 FPGA.

To account for jitter (clock uncertainty), you must specify the INPUT_JITTER using the period constraint. The INPUT_JITTER value should reflect the total Jitter (JTotal). See (Xilinx Answer 13645).

If your design uses one DCM with two output clocks (for example, CLK0 and CLKFX) for Total jitter calculation, you must use the value from the DCM output that gives you the maximum jitter:

JSpec = Max(DCM_JSpec)

If you are cascading DCMs in your design with one of the DCMs using the CLKFX output, the jitter specification for the DCM is equal to the square root of the sum of the squared jitter specification for each DCM:

JSpec = (DCM1_JSpec2+DCM2_JSpec2)^1/2

If you are cascading DCMs in your design but are not using CLKFX, the jitter specification should be the sum of the DCM's jitter specification:

JSpec = DCM1_JSpec+DCM2_JSpec

The input jitter used in the computation of clock uncertainty for internal flip-flops is equal to the square root of the sum of squares of the input jitter values for the source and destination flip-flops. The uncertainty equation is as follows:

Uncertainty = [(System Jitter2 + sum(Input Jitter2))^1/2]/2

If the system_jitter constraint is zero, the equation is as follows:

Uncertainty = [(sum(Input Jitter2))^1/2]/2

For calculation using only one clock (one flip-flop,e.g., IOB setup/hold) the equation is as follows:

Uncertainty = [(Input Jitter2)^1/2]/2
AR# 20828
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article
  • ISE - 10.1
  • ISE Design Suite - 11.1
  • ISE Design Suite - 11.2
  • More
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
  • ISE Design Suite - 12.3
  • ISE Design Suite - 13.1
  • Less