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AR# 20896

6.3 EDK - Base System Builder (BSB) generated UCF constraints do not follow XILINX recommended syntax

Description

Keywords: EDK, BSB, UCF, period, constraint

Urgency: Standard

General Description:
Base System Builder generated UCF constraints do not follow XILINX recommended syntax.

Solution

1

There is a problem where MAP occasionally discards the clock period constraint set in the UCF file by BSB. The syntax used currently is not the syntax recommended by Xilinx but a simplified syntax. Please modify the UCF file for BSB-generated designs to mach the recommended syntax.

Current syntax:

NET clock_in PERIOD 10000 ps;


Recommended syntax:

NET clock_in TNM_NET = clock_in;
TIMESPEC TS_clock_in = PERIOD clock_in 10000 ps;

2

This problem has been fixed in the latest EDK 7.1i Service Pack available at:
<http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp>
The first service pack containing the fix is EDK 7.1i Service Pack 1.
AR# 20896
Date Created 03/02/2005
Last Updated 04/12/2007
Status Archive
Type General Article