How do I implement PMARXLOCK behavior in parallel loopback mode?
To implement the Virtex-II Pro X RocketIO lock in parallel loopback mode, you can perform one of the following options:
Option 1: Feed data to the RX port
Option 2: Set PMARXLOCKSEL =2'b10 (force to lock to data)
- When PMA RX Lock is not stable in parallel loopback mode, data received on the RX will still be correct. The parallel loopback works even if PMARXLOCK is unstable because the PCS TX clock is internally looped back to PCS RX side and used instead of the RX clocks from the PMA.
- You must have data at the receiver input for the PMARXLOCK to be stable. You can force PMARXLOCKSEL to "10" during parallel loopback mode, which causes PMARXLOCK to stay High.
- The above Resolution pertains only to the parallel loopback mode, and not to the serial loopback mode. An unstable PMARXLOCK in serial loopback mode indicates the inability of the RX PLL to lock, and can cause data errors.