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AR# 21354 Virtex-4 RocketIO - Are there any skew requirements on TX/RXUSRCLK and TX/RXUSRCLK2?

General Description:

Are there any skew requirements on TX/RXUSRCLK and TX/RXUSRCLK2?

There are no explicit skew requirements. Both clocks are rising edge active.

In general, for the TX, the TXUSRCLK rising edge should lead the TXUSRCLK2 rising edge and, for the RX, the RXUSRCLK2 rising edge should lead the RXUSRCLK rising edge.

In the two most frequently encountered models, this is not an issue:

- DCM-sourced TX/RXUSRCLK and TX/RXUSRCLK2

In this case, they are always in phase.

- TX/RXUSRCLK sourced from TXOUTCLK1 and/or RXRECCLK1 and using internal MGT dividers for generating TX/RXUSRCLK2.

In this case, they are always in phase.

AR# 21354
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article
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