PAR has problems placing components or completely routing the SPI4.2 design in my design. The following warnings and errors occur while running PAR:
"WARNING:Place:119 - Unable to find location. SLICEL component
pl4_implv4_128b_10dyn40937_22_pl4_src_top0/U0/sync0/str3/d2_ffs not placed.
SLICEL "pl4_implv4_128b_10dyn40937_22_pl4_src_top0/U0/sync0/str3/d2_ffs".
<COMPGRP "AG_pl4_src.SLICE" LOCATE = SITE "SLICE_X28Y32:SLICE_X5...>
[./mapped.pcf(3268)] "COMPGRP "AG_pl4_src.SLICE" LOCATE = SITE
"SLICE_X28Y32:SLICE_X55Y63" SITE "SLICE_X28Y64:SLICE_X55Y95" LEVEL 4"
The AREA group contains 896 possible sites for this component. 0 of these
sites were available to place this component into.
===============================================================
List of comps in area without same LOC are:
===============================================================
ERROR:Place:120 - There were not enough sites to place all selected components"
or
"IMPORTANT MSG: UNROUTABLE DESIGN; CHANGE PLACEMENT or EASE CONSTRAINTS
WARNING:PAR:100 - Design is not completely routed."
Consequently, when PAR fails to route, the following error occurs in BitGen:
"ERROR:PhysDesignRules:9 - The network <TSClk_GP_i> is only partially routed."
You can possibly work around this by trying different cost tables for the PAR option "-t."
or by locking down BUFG and BUFR components to appropriate locations.