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AR# 21428

10.1 Floorplan Editor/PACE - An error occurs when I use PACE to perform pin constraints with my design files in a different directory


When my design files reside in a different directory, the following errors occur:

"Loading device for application Rf_Device from file '2vp50.nph' in environmentC:/Xilinx71.

Compiling vhdl file "c:/work/sri2/loopback_test/loopback_top.vhd" in Librarywork.

ERROR:HDLParsers:3317 - "c:/work/sri2/loopback_test/loopback_top.vhd" Line 40. Library pf03firmwarelib cannot be found.

ERROR:HDLParsers:3013 - "c:/work/sri2/loopback_test/loopback_top.vhd" Line 41. Library pf03firmwarelib is not declared.

WARNING:HDLParsers:3481 - Library work has no units. Did not save reference file "C:/DOCUME~1/Josh/LOCALS~1/Temp/xil_2412_5/hdllib.ref" for it."

How can I resolve this issue?


You can work around this issue by using "Assign Package Pins Post-Translate" or by manually editing the ".ucf" file.

AR# 21428
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article