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AR# 2195

JTAG - Are update latches and data registers reset in the Test Logic Reset state?


General Description:

What happens to update latches and data/instruction registers of the boundary scan circuitry when the device enters the Test-Logic-Reset state? Are they set or reset?


When the device enters the Test-Logic-Reset state, the BYPASS instruction becomes the current instruction; hence, the instruction register and update latches are set (output High).

The 1-bit BYPASS register is selected by the BYPASS instruction. You may shift out the data in this register by performing the shift-DR instruction.

AR# 2195
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article