AR #21999 - LogiCORE SPI-4.2 (POS-PHY L4) Lite v3.0 - When implementing an SPI-4.2 Lite design through Bitgen, I receive several "WARNING" messages
LogiCORE SPI-4.2 (POS-PHY L4) Lite v3.0 - When implementing an SPI-4.2 Lite design through Bitgen, I receive several "WARNING" messages
| AR# | 21999 |
| Part | Coregen POS PHY Lite |
| Last Modified | 2005-08-31 00:00:00.0 |
| Status | Active |
| Keywords | CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h,PL4, packet, SONET, physical, link |
Description
Keywords: CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h, PL4, packet, SONET, physical, link, layer, source, synchronous, phase, alignment, sink, static, spi4.2, spi4-2, lite, quarter, rate, Bitgen, warning, block, dangling, pin, phys, design, rules
Urgency: Standard
General Description:
When implementing an SPI-4.2 Lite design through Bitgen, I receive several "WARNING" messages.
The following warnings are harmless and can be ignored.
Solution
Example:WARNING:PhysDesignRules:812 - Dangling pin on block::<D IFFMI_IFF1>.
WARNING:PhysDesignRules:812 - Dangling pin on block::<D IFFMI_IFF1>.
WARNING:PhysDesignRules:812 - Dangling pin on block::<D IFFMI_IFF1>.