AR #22001 - LogiCORE SPI-4.2 (POS-PHY L4) Lite - Design example gives warnings for source segmenting packets

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LogiCORE SPI-4.2 (POS-PHY L4) Lite - Design example gives warnings for source segmenting packets

AR# 22001
Part Coregen POS PHY Lite
Last Modified 2006-07-11 00:00:00.0
Status Active
Keywords CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h,PL4, packet, SONET, physical, link, layer, source, synchronous, phase, alignment, sink, static, spi4.2, spi4-2, quarter, rate, simulation, v3.0, v3.1, v4.1, 8.2i

Description

Keywords: CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h, PL4, packet, SONET, physical, link, layer, source, synchronous, phase, alignment, sink, static, spi4.2, spi4-2, quarter, rate, simulation, v3.0, v3.1, v4.1, 8.2i

When I use the Source Core FIFO using the credit boundary (SrcBurstMode = 0), it is allowed to segment packets on the credit boundary. The following warning occurs in the design example testbench:

"TDat Warning : Source is segmenting packets."

Solution

This warning message is due to example testbench issues and can be ignored.
 
 
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