| AR# | 22026 |
| Part | Coregen POS PHY Lite |
| Last Modified | 2006-07-11 00:00:00.0 |
| Status | Active |
| Keywords | CORE, CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h,PL4, packet, SONET, physical |
Keywords: CORE, CORE Generator, COREGen, IP, update, 7.1i, #3, ip3_h, PL4, packet, SONET, physical, link, layer, source, synchronous, phase, alignment, sink, static, spi4.2, spi4-2, lite, quarter, rate, simulation, error, x_oddr, hold, violation, v3.0, v3.1, v4.1, 8.2i
When simulating SPI-4.2 Lite design, I receive the following error:
"# ** Error: /X_ODDR HOLD Low VIOLATION ON D1 WITH RESPECT TO C;"