When I connect an OPB IIC as an IIC Master to an IIC Slave, I cannot reliably do an IIC Read from an external IIC device such as a microcontroller. The PPC405's FIFO does not contain the correct information.
The OPB IIC Core is sampling the SDA data line on the falling edge of the (SCL) clock when reading the IIC slave device.
This issue has been fixed in the latest OPB IIC in the EDK 8.1Sp2 release. Please refer to 'change Log' for additional clarification on this core.