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AR# 22107

7.1i XST - Shared variable support in XST


Keywords: VHDL, RAM, block, dual, write

VHDL shared variables are supported in XST only for the inference of dual-write RAM.


When using shared variables in XST, be sure to name the variable something completely different than any other signal that will be inferred into a RAM. Otherwise, all of the RAM signals will take on the same characteristics of the shared variable.

For example, if the shared variable gets inferred into a RAMB16_S4_S4, then all of the other RAM signals will be inferred into a RAMB16_S4_S4. Assigning an entirely unique name to the variable resolves this problem.

This issue is fixed in ISE 8.1i.
AR# 22107
Date Created 09/04/2007
Last Updated 01/08/2009
Status Archive
Type General Article