We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22155

8.1i IP Update #1 CORE Generator - Release Notes and Known Issues for CORE Generator ISE 8.1i IP Update 1 (IP1_I)


Keywords: networking, Ethernet, MAC, XAUI, gigabit, SPI, SPI4, SPI42, SPI-4.2, SPI4.2, PL4, GFP, Tri-Mode, generic, framing, procedure, SONET, system, packet, interface, fibre, channel, DVB-ASI, FIFO, fifo16, cam, asynchronous, 8b10b, decoder, ip4_g, embedded, Aurora, wrapper, PCI, PCI-X, PCI32, PCI64, PCIX, PIPE, PCI Express, UCF Generator, counter, DSP, Binary Counter, Comparator, Complex Multiplier, Distributed Arithmetic FIR Filter, DVB S2 FEC Encoder, Floating-point Cores, MAC, MACC, Pipelined Divider, RAM-based Shift Register, TCC Encoder 3GPP, LogiCORE, CORE, COREGen, CORE Generator

This Answer Record contains Release Notes for ISE 8.1i IP Update 1 (also known as IP1_I) and includes the following:

- IP Related Known Issues
- Software and Tool Requirements
- Installation Instructions
- MXE Simulation Library

Main informational page on Xilinx.com for this release:

For IP-specific information, see the Xilinx IP center web page:

For information on migrating Block Memory cores to the new Block Memory Generator, see the Block Memory Generator Migration Kit:


CORE Generator IP Update 1

Cores Included in this Release

The following link provides a list of all IP available with IP1_I.

Supported Operating Systems

- Windows 2000 Professional (Service Pack 2 to 4)
- Windows XP Home (Service Pack 1)/Professional (Service Pack 1)
- Sun Solaris 8/9
- Linux Red Hat Enterprise 3.0 (32-bit and 64-bit)

Tool Requirements

To use this IP Update, first ensure that you have installed ISE 8.1i with Service Pack 1 (8.1i.01i) or later. ISE 8.1i Service Packs can be downloaded from the following page:

Acrobat Reader Requirement

Acrobat Reader Version 5 or later must be installed to view core data sheets. You can download the latest Acrobat software from the Adobe site:

To search for other available IP cores, go to:

If you have comments, questions, or problems, contact Xilinx Technical and Applications Support at:

Install the IP Update using one of the following methods:

Method 1: Automated Update using the Updates Installer

1. Start the CORE Generator Update Installer (from the CORE Generator main GUI, select Tools -> Update Installer).
If you are prompted for a proxy host, contact your administrator to determine the proxy host address and port number that you should be using to get through your firewall.
2. Select "ISE 8.1i IP Update 1 (FTP)," or "ISE 8.1i IP Update 1 (HTTP)" from the list of updates in the Available Packages panel, depending on the mechanism that works best for you.
3. Click "Add To Install Queue" to add the zip file for the update to the install queue.
If you are prompted to enter a login name and password, use the Xilinx login and password that you normally use to download IP Updates and Service Packs.
4. Click "Install All Packages From Queue" to automatically initiate a download of the update.
After the update is downloaded, the Updates Installer displays a dialog box indicating that it is terminating the CORE Generator session and installing the downloaded archive. Another dialog box will indicate when the update installation is complete; you can then restart CORE Generator.
5. To confirm that you have installed the update properly, check the following file:

NOTE: This step assumes that your Xilinx design tools are installed in C:\Xilinx.

Method 2: Manual Installation

Use this method if you are behind a firewall and do not know your proxy settings:
1. Close the CORE Generator application, if it is running.
2. Download the ".zip" file from the following location and save it to a temporary directory:

NOTE: Before you can access this page and the files listed on it, you must be registered for CORE Generator IP Updates access.

3. Extract the ".zip" file (81i_ip_update1.zip) archive to the root directory of your Xilinx design tools installation. Allow your extractor utility to overwrite all existing files and maintain the directory structure predefined in the archive.

Unzip the ".zip" file using WinZip 7.0 SR-1 or later. The Xilinx design tools installation directory is typically located at "C:\XILINX," if the installation defaults were used. You can verify the location of the Xilinx install by entering the following on the DOS command line:
echo %XILINX%
NOTE: When extracting the files using WinZip, you have to check the Use Folder Names option.

Use unzip to unpack the ".zip" file. If you have already installed your Xilinx ISE design tools, the Xilinx installation directory location is the value of the XILINX variable, which is defined by your setup script. After sourcing your Xilinx setup script, enter the following to determine the location of your Xilinx installation:
echo $XILINX
NOTE: You might need system administrator privileges to install the update.

4. Restart CORE Generator. CORE Generator automatically detects and displays the newly installed IP cores.
5. Determine whether the installation was successful by verifying that the new cores are visible in the CORE Generator GUI.

The following is a listing of Release Notes and Known Issue links for IP included in this IP Update release:

- Release Notes and Known Issues for FIFO Generator v2.3 (Xilinx Answer 22302)
- Release Notes and Known Issues for Distributed Memory Generator v2.1 (Xilinx Answer 22311)
- Release Notes and Known Issues for Packet Queue v1.1 (Xilinx Answer 22303)
- Release Notes and Known Issues for Block Memory Generator v1.1 (Xilinx Answer 22304)
- Release Notes and Known Issues for GFP v1.3 (Xilinx Answer 21030)

- Release Notes and Known Issues for LogiCORE PCI v3.155, PCI-X v5.105 and PCI/PCI-X UCF Generator v1.0 (Xilinx Answer 22321)
- Release Notes and Known Issues for LogiCORE RapidIO v3.1 (Xilinx Answer 22319)
- Release Notes and Known Issues for LogiCORE PCI Express v3.1 (Xilinx Answer 22320)
- Release Notes and Known Issues for LogiCORE PCI Express PIPE v1.3 (Xilinx Answer 22322)

- Release Notes and Known Issues for LogiCORE Gigabit Ethernet MAC v7.0 (Xilinx Answer 22326)
- Release Notes and Known Issues for LogiCORE Tri-mode Ethernet MAC v2.2 (Xilinx Answer 22328)
- Release Notes and Known Issues for LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII v7.0 (Xilinx Answer 22327)
- Release Notes and Known Issues for LogiCORE 10 Gigabit Ethernet MAC v7.0 (Xilinx Answer 22330)
- Release Notes and Known Issues for LogiCORE Ethernet Statistics v1.2 (Xilinx Answer 22325)
- Release Notes and Known Issues for LogiCORE Fibre Channel v2.1 (Xilinx Answer 22323)
- Release Notes and Known Issues for LogiCORE XAUI v6.1 (Xilinx Answer 22331)
- Release Notes and Known Issues for LogiCORE Fibre Channel Arbitrated Loop v1.1 (Xilinx Answer 22324)
- Release Notes and Known Issues for LogiCORE Virtex-4 Tri-Mode Ethernet MAC Wrappers v4.1 (Xilinx Answer 22332)

- Release Notes and Known Issues for all DSP products (Xilinx Answer 22292)
-- LogiCORE Binary Counter V8.0
-- LogiCORE Convolutional Encoder v5.0
-- LogiCORE Divider Generator v1.0
-- LogiCORE DVB S2 FEC Encoder v1.2
-- LogiCORE Fast Fourier Transform (xFFT) v3.2/patch 1
-- LogiCORE FIR Compiler v1.0
-- LogiCORE Floating Point v2.0
-- LogiCORE Multiplier Generator v8.0
-- LogiCORE TCC Decoder 3GPP v2.0
-- LogiCORE CTC Encoder 802.16e v1.1

- Release Notes and Known Issues for Aurora v2.4 (Xilinx Answer 22521)

- Release Notes and Known Issues for CAN v1.3 (Xilinx Answer 22342)

- Release Notes and Known Issues for SPI-4.2 v7.4 (Xilinx Answer 22300)
- Release Notes and Known Issues for SPI-4.2 Lite v3.1 (Xilinx Answer 22390)
- Release Notes and Known Issues for SPI-3 PHY v4.1 (Xilinx Answer 22381)
- Release Notes and Known Issues for SPI-3 Link v4.1 (Xilinx Answer 22382)

NOTE: For more information on SPI Migration from v6.2 to v7.4, see (Xilinx Answer 22703).
NOTE: For more information on SPI Migration from v7.3 to v7.4, see (Xilinx Answer 22704).

General CORE Generator Known Issues

(Xilinx Answer 20478) - 8.1i CORE Generator - A COREGen project created on PC does not behave properly on Linux and Solaris systems.
(Xilinx Answer 21955) - 8.1i CORE Generator - An error occurred while running Java. This may be due to memory limitations.
(Xilinx Answer 21364) - 8.1i CORE Generator - Attempting to open a core customization GUI opens the data sheet for the selected IP core.
(Xilinx Answer 22583) - 8.1i CORE Generator - Dual Port Block Memory v6.3 - "Show Coefficients" does not display the content of the COE file if the depth is greater than 511.
(Xilinx Answer 22601) - 8.1i CORE Generator - Fragmented or seemingly incomplete error messages are being displayed in the COREGen console window.
(Xilinx Answer 22581) - 8.1i CORE Generator - Option to open previous project will open SysGen created project.
(Xilinx Answer 22605) - 8.1i CORE Generator - Project -> Project Options... "Preferred Implementation Files" label is not fully visible on Solaris and Linux platforms.
(Xilinx Answer 22600) - 8.1i CORE Generator - Selecting View Version information for a specified IP Core results in "ERROR:sim:165 - Could not find version info."
(Xilinx Answer 22547) - 8.1i CORE Generator - The Display Core Footprint checkbox is no longer available in an IP core customization GUI.
(Xilinx Answer 22548) - 8.1i CORE Generator/ISE Simulator - "WARNING:Simulator:29 - at 0 ns: Warning: No entity is bound for inst <instance name> of Component <core name>."
(Xilinx Answer 22549) - 8.1i ISE/CORE Generator - When running Manage Cores through Project Navigator on Linux 32, IP cores cannot be customized when Java memory is set to 2048 or above.
(Xilinx Answer 20715) - 8.1i CORE Generator - Error occurred while executing formal verification script "core2formal_wrp."
(Xilinx Answer 20919) - 8.1i CORE Generator - IP "readme.txt" file contains generic information for ".v" and ".vhd" files, which is not applicable for Reference Designs.
(Xilinx Answer 23535) - 8.1i CORE Generator - The IPupdate.log is not properly updated when installing IP update 1 for ISE 8.1i (IP1_I)

MXE Simulation Library

The cores delivered with this IP Update require updated XilinxCoreLib libraries. For information on how to obtain the latest pre-compiled MXE libraries, see (Xilinx Answer 10616).
AR# 22155
Date Created 09/04/2007
Last Updated 03/04/2008
Status Archive
Type General Article