When I use the code from the "XST User Guide," Chapter 2 - HDL Coding Techniques -> RAMs/ROMs -> Dual Port Block RAM with Two Write Ports, and try to infer this type of RAM targeting one of the older devices such as Virtex, Virtex-E, Spartan-II, or Spartan-IIE, an incorrect RAM implementation is generated. A single input is connected to both write ports on the block RAM.
Dual-port RAM support is only for Virtex-2 Pro families and newer, and is not intended for older devices. If you target one of the newer devices, the correct type of RAM is inferred.
To work around the issue, you can either instantiate the block RAM primitive that you want to use, or use CORE Generator to generate the RAM.