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AR# 22451

7.1i FPGA Editor, fpga_edline - setattr results in DRC errors


When I use the setattr commands in a script from FPGA Editor or fpga_edline to edit MGT components, the following error occurs: 


"#ERROR:PhysDesignRules:792 - Illegal configuration for block...."


To work around this issue, use Edit Block in the FPGA Editor GUI to make the changes.

AR# 22451
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article