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AR# 22460

LogiCORE PCI Express - What is the throughput of the PCI Express PIPE x1 Core?

Description

General Description: 

What is the throughput of the PCI Express PIPE Core?

Solution

The throughput values of the PCI Express PIPE Core are given below. Please remember that these numbers are highly dependent upon the overall system design.  

 

For example, if the Xilinx PCI Express PIPE Core is communicating with the system host, the speed of the host and the system software will affect the throughput of the Xilinx PCI Express PIPE Core. Also, if the Xilinx Core does not receive ACKs in a timely manner, it will pause in transferring data once its internal buffers fill up; it then waits until ACKs are received to release the buffer space for the next packet. 

 

The throughput values below were determined with the following guidelines: 

1. Test setup consists of two PCI Express PIPE 1 Lane endpoints communicating with each other. 

2. Traffic for each of the tests below consists of back-to-back MEMORY WRITE32 TLPs of specified size. 

3. The traffic scenario is simplex only (i.e., data (TLPs) is flowing only in one direction). 

4. Performance numbers represent average maximum sustainable throughput in terms of MEMORY WRITE32 TLP payload, measured at core transmit interface. 

5. An underlying assumption is that the core transmitter is never throttled due to ACK or FC update latency. 

 

PCI Express PIPE x1 Throughput  

 

Test#____Payload Size (bytes)____Throughput (Gb/s) 

....1...................................128.......................................1.63 

....2...................................256.......................................1.74

AR# 22460
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article