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AR# 22702

LogiCORE Block Memory Generator v1.1 - Write port output becomes undefined during read-write collision when using NC-Sim


When simulating the core with NC-Sim, the write port output becomes undefined during read-write collision. This occurs when the write port operating mode of the Block Memory Generator Core is set to "Write First" or "No change". When a read-write collision occurs, the output of the write port becomes undefined.


To work around this issue, recompile UniSim and SimPrim libraries using the -RELAX option as follows: 

1. Run compxlib -cfg. 

2. Edit the "compxlib.cfg" file with -RELAX for the ncvhdl line. 

3. Run compxlib. 


This issue has been fixed with ISE8.1i Service Pack2.

AR# 22702
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article