Main
Home  :  Support  :  Answers  :  LogiCORE FIR Compiler v1.0 or v2.0 and 8.1 or 8.2 NGDBuild - Single rate MAC FIR filter fails to generate, empty or missing netlist, and "ERROR:sim - NgdBuild:153" or "ERROR:NgdBuild:604"

LogiCORE FIR Compiler v1.0 or v2.0 and 8.1 or 8.2 NGDBuild - Single rate MAC FIR filter fails to generate, empty or missing netlist, and "ERROR:sim - NgdBuild:153" or "ERROR:NgdBuild:604"

AR# 22706

Search For Another Answer
Topic IP-DSP Horizontal
Last Updated 08/06/2008
Status Active
Description

Keywords: CORE, CORE Generator, CORE Generator, LogiCORE, Filter, FIR, Compiler, MAC, MACC, DA FIR

Why does my single rate MAC FIR filter fail to generate, giving me an empty or missing netlist, and the following errors:

"ERROR:sim - NgdBuild:153"
or
"ERROR:NgdBuild:604"?

Example 1:
ERROR:sim - NgdBuild:153 - The input EDIF file
"proj/tmp/_cg/m5_multi_sr_80622_18_fir_compiler_v1_0_xst_1_mac_fir_v5_1_xst.edn" is empty!
ERROR:sim - NgdBuild:276 - edif2ngd exited with errors (return code 2).

Example 2:
ERROR:NgdBuild:604 - logical block
'm5_multi_sr_80622_18_top/BU2/U0/m5_multi_sr_80622_18_fir_compiler_v1_0_xst_1
_mac5' with type
'm5_multi_sr_80622_18_fir_compiler_v1_0_xst_1_mac_fir_v5_1_xst' could not be
resolved. A pin name misspelling can cause this, a missing edif or ngc file,
or the misspelling of a type name. Symbol
'm5_multi_sr_80622_18_fir_compiler_v1_0_xst_1_mac_fir_v5_1_xst' is not
supported in target 'spartan2'.

Solution

This should only occur for non Virtex-4 AND Virtex-5 cores.

This is resolved in v2.0 of the FIR Compiler.
 
 
/csi/footer.htm