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AR# 22709

8.2 System Generator for DSP - Why do I see simulation mismatches with the DDS v4.0 when both the reset port and pipelining are enabled?

Description

Why do I see simulation mismatches with the DDS v4.0 when both the reset port and pipelining are enabled?

Solution

You can work around this issue by using the DDS v5.0 block.

AR# 22709
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article