AR #22747 - BitGen Spartan-3 - DRC error occurs when RSDS_25 and LVCMOS25 are placed in the same bank
BitGen Spartan-3 - DRC error occurs when RSDS_25 and LVCMOS25 are placed in the same bank
| AR# | 22747 |
| Part | Spartan-3 Family |
| Last Modified | 2006-04-18 00:00:00.0 |
| Status | Active |
| Keywords | banking, rules |
Description
Keywords: banking, rules
Why does the following DRC error occur in BitGen when RSDS_25 and LVCMOS25 outputs are placed in the same bank:
"ERROR:PhysDesignRules:759 - IOB comp <xx> at location <yy> is incompatible for bank <#>. The incompatible code is <1>."
Solution
Putting an LVCMOS25 output in the same bank as an RSDS_25 output is a valid placement.This problem has been fixed in the latest 8.1i Service Pack available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 8.1i Service Pack 2.
For more information on banking rules for Spartan-3, see the Functional Description module of the Spartan-3 data sheet located at:
http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?sGlobalNavPick=&sSecondaryNavPick=&category=-1209725&iLanguageID=1