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AR# 22747

BitGen Spartan-3 - DRC error occurs when RSDS_25 and LVCMOS25 are placed in the same bank

Description

Why does the following DRC error occur in BitGen when RSDS_25 and LVCMOS25 outputs are placed in the same bank:

"ERROR:PhysDesignRules:759 - IOB comp <xx> at location <yy> is incompatible for bank <#>. The incompatible code is <1>."

Solution

Putting an LVCMOS25 output in the same bank as an RSDS_25 output is a valid placement.

This problem has been fixed in the latest 8.1i Service Pack available at:

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 8.1i Service Pack 2.

For more information on banking rules for Spartan-3, see the Functional Description module of the Spartan-3 data sheet located at:

http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?sGlobalNavPick=&sSecondaryNavPick=&category=-1209725&iLanguageID=1

AR# 22747
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article