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LogiCORE Block Memory Generator v1.1 - Incorrect information in the data sheet: the enable pin behaves the same as the old Block Memory Core

AR# 22790

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Topic Coregen Block Memory Generator
Last Updated 07/12/2006
Status Active
Description

Keywords: CORE, COREGen, CORE Generator, IP, update, 8.1i, ip1_i, mem, memory, asyncn, asymmetric, non-symmetric, RAMB, block RAM, BRAM, RAMB16, RAMB, data sheet, datasheet, error, enable

There is an error on the Block Memory Generator v1.1 Data Sheet, on page 32, information section on modified behaviors of the old and the new cores. The explanation of the behavior of the enable pin is incorrect.

Solution

There is no difference between old and new cores. The enable pins behave the same.

This information has been corrected in the Block Memory Generator v3.1Data Sheet.
 
 
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