Main

8.1i EDK - PPC405 errata 213 on Virtex-4 VxWorks BSP needs to be updated

AR# 22868

Search For Another Answer

Topic IP-Processor
Last Updated 08/23/2006
Status Active
Description

Keywords: PPC405, PPC405 errata, errata 213, Virtex-4, Vxworks, BSP

The VxWorks BSP template needs to be updated to implement the work-around for PPC405 errata 213.

NOTE: The work-around is only applied if the processor version register (PVR) matches PVR: 0x20011430 in PowerPC.

The work-around should be placed in "sysALib.s" immediately after clearing the MSR, at which point bits 1 and 3 of CCR0 are set. Note that these bits are undocumented by IBM.

Failure to implement this fix can lead to random memory corruption.

"sysALib.s" has been changed for template BSPs to include modifications to CCR0.

Solution

This issue has been fixed in "vxworks6_1" and is included in the latest EDK 8.1i Service Pack, available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is EDK 8.1i Service Pack 1.


 
 
/csi/footer.htm