| AR# | 23087 |
| Part | SW-Timing Analyzer/TRCE |
| Last Modified | 2008-06-17 00:00:00.0 |
| Status | Archive |
| Keywords | clock, uncertainty, hold, time, global, BUFGMUX, BUFG |
Keywords: clock, uncertainty, hold, time, global, BUFGMUX, BUFG
When I do timing analysis on my design, I receive a hold violation on a global or BUFG clock. The Clock Uncertainty value is non-zero and results in the hold violation. A hold analysis on a global clock should not include clock uncertainty. When will this be fixed?