We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 23202

LogiCORE XAUI v6.1 Core - CHAN_BOND_LIMIT value on GT11s is incorrect


When the XAUI v6.1 Core example design files are generated in Core Generator, CHAN_BOND_LIMIT is currently set to 31 on all GT11s. This should be reduced to 7 to meet requirements. The current setting of 31 is outside the 802.3ae spec. The setting of 31 also means that the CLK_COR_MIN_LAT and MAX_LAT settings are outside the parameters set in the GT11 User Guide.


Changing to 7 will resolve this problem. This will involve changing the "transceivers.v/vhd" file in the example design.  


In the verilog file, change the line "synthesis attribute CHAN_BOND_LIMIT of GT11" from "31" to "7", and the same for the defparams (there are 4 instances of each of these). 


In the vhdl file, change the CHAN_BOND_LIMIT generic from 31 to 7 (there are 4 instances of this as well).

AR# 23202
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article