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AR# 23334 8.1i XST - XST generates incorrect logic when an integer type is used in a record type in VHDL


When using an integer in a record type, XST generates incorrect logic, and the behavioral simulation differs from the timing simulation.



The following is an example that generates incorrect logic:



==================================

Type tr_record is record

int : integer ;

end record ;



subtype ti_index is integer range 0 to 15

type tar_array_of_rec is array(ti_index) of tr_record

================================


You can work around this issue by using one of the following two methods:



Method 1: Use another type (such as an unsigned), as shown in the example below:



==================================

Type tr_record is record

un : unsigned ;

end record ;



subtype ti_index is integer range 0 to 15

type tar_array_of_rec is array(ti_index) of tr_record

================================



Method 2: Create an integer array type out of the record type, as shown in the example below:



type tai_array_of_int is array(ti_index) of integer ;



This problem has been fixed in the ISE 8.2i Service Pack 1, available at:

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
AR# 23334
Date Created 09/04/2007
Last Updated 10/06/2011
Status Archive
Type
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