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AR# 23491 LogiCORE Distributed Memory Generator v3.1 - Release Notes and Known Issues for the Distributed Memory Generator Core (8.2i_IP1)

Description


This Release Note is for the Distributed Memory Generator Core v3.1 released in 8.2i IP Update 1, and contains the following:

- New Features
- Bug Fixes
- Known Issues

For installation instructions and design tools requirements, see (Xilinx Answer 23479).

The Xilinx Distributed Memory Generator v3.1 LogiCORE should be used in all new designs for supported families wherever a distributed memory is required. This core supersedes all versions of the previously released Distributed Memory LogiCORE.

Solution


New Features in v3.1
Support added for Virtex-5
Support added for ISE 8.2i design tools

Bugs Fixed in v3.1
CR 225505: COE parser does not recognize newline as whitespace has been fixed
CR 230095: Figure 6 in data sheet has a wiring error that has been corrected

Known Issues in v3.1
(Xilinx Answer 21393) When a large Distributed Memory Generator IP is generated, CORE Generator runs out of memory and fails to generate.

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AR# 23491
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article
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