| AR# | 23522 |
| Part | SW-Project Navigator |
| Last Modified | 2009-04-25 00:00:00.0 |
| Status | Active |
| Keywords | status, update, top, instantiate, Verilog, HDL, out of date, library |
Keywords: status, update, top, instantiate, Verilog, HDL, out of date, library
If an `include file (for example, header.h) has changes made to it, the process status of any modules, including the file, should be marked "out of Date" and the hierarchy of the design should be re-evaluated. The status is not being properly reset.