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LogiCORE Multiplier v8.0 - The SCLR does not reset the upper bits of a DSP48-based 35 x 18 multiplier. Why?

AR# 23591

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Topic IP-DSP Horizontal
Last Updated 04/06/2009
Status Active
Description

Keywords: CORE, CORE Generator, CORE Generator, coregen, large, xtremedsp, large, wide, dedicated, mult, dsp

The SCLR does not reset the upper bits of a DSP48-based 35 x 18 multiplier. Why?

Solution

This is a known bug in the reset of the Multiplier v8.0, and is fixed in Multiplier v9.0.

The way to work around this issue is to infer registers with a reset at the output of the multiplier, using HDL.
 
 
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