This Answer Record shows how to migrate the SPI-4.2 Core from v7.4 to v8.1, and describes the signal changes made to the core. Every attempt was made to keep the constraints, input, and output signals consistent between versions. This Answer Record covers those modifications required to upgrade from v7.4 to v8.1.
The following sections are included:
- Core Signal Changes
- Wrapper File Changes
- UCF and NCF File Changes
Core Signal Changes
The following signals were added to the v8.1 Sink Core:
- SnkDPARamAddr (output): Phase Alignment RAM Address. Bus indicating the ISERDES tap value that corresponds to the data on SnkDPARamData.
- SnkDPARamData (output): Phase Alignment RAM Data. Initial data collected during alignment. Used to find the valid data window for each bit of the SPI-4.2 bus.
- SnkDPARamValid (output): Phase Alignment RAM Valid. Active high signal indicating the information on SnkDPARamData and SnkDPARamAddr is valid.
These three ports present the user with the data collected by the logic while finding the data valid window for each of the SPI-4.2 data and control bits (between assertion of PhaseAlignRequest to PhaseAlignComplete). See User Guide for further information on debugging and DPA Status Monitoring Feature. These three ports are used solely for debugging purposes. If not needed, these ports can be left unconnected.
The following signal was added to the v8.1 Source Core:
- SrcStatFrameErr (output): Source Status Frame Error. When this signal is asserted (active high), it indicates that a non "11" frame word was received after DIP2 on TStat. This signal is asserted for one clock cycle each time a frame word error is detected. If not needed, this port can be left unconnected.
Wrapper File Changes
The v8.1 wrapper file replaces the v7.4 wrapper file.
UCF File Changes
The UCF file must be updated by replacing all SPI-4.2 constraints in the UCF file with SPI-4.2 constraints provided in the v8.1 release.
Dynamic Alignment Implementation Considerations
The Sink user interface contains one input and two output signals that are used for dynamic alignment. The usage of the PhaseAlignRequest signal has been changed. For more information on dynamic alignment implementation considerations, see the User Guide.