When targeting Virtex-5, SPI-4.2 design with "Insert IDELAY on RDCLK" feature selected, in MAP, I receive the following error:
"ERROR:Place:293 - The following 4 components are required to be placed in a
specific relative placement form. The required relative coordinates in the
RPM grid (that can be seen in the FPGA Editor) are shown in brackets next to
the component names. Due to placement constraints it is impossible to place
the components in the required form.
IODELAY core_pl4_snk_top0/U0/clk0/rdclk_idel (5, 0) placed
at site IODELAY_X1Y161
IOB RDClk_P (0, 0) placed at site IOB_X1Y161
Empty site required (1, 0) IOB RDClk_N (0, -12) placed
at site IOB_X1Y160"
This error is due to an issue with MAP and is fixed in ISE 8.2i Service Pack 2.