Description

While simulating the Block Memory Generator Core with asymmetric configuration, DOUTA of the RAMB16 primitives changes on rising edge of CLKB , which is incorrect. This might potentially cause a collision error.

Solution

This is UNISIM model issue addressed in 8.2i Service Pack 3.

To obtain status on this issue, please open a WebCase with Xilinx Technical Support:

http://www.xilinx.com/support/techsup/tappinfo.htm