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# AR# 23710

## Description

How is clock uncertainty calculated for Virtex-4 and newer families?

Prior to the Virtex-4 family release, Timing Analyzer did not take into account DCM jitter and phase error automatically. Now that DCM characterization is available for Virtex-4 and newer devices, jitter and phase error values have been added to Timing Analyzer, and thus clock uncertainty is calculated using a different equation.

## Solution

The following equation shows how clock uncertainty is calculated with DCM jitter and phase error:

Clock Uncertainty = [((System Jitter^2) + (Input Jitter^2)) ^ (1/2) + DCM Jitter] / 2 + DCM Phase Error

Use Input Jitter to specify random, peak-to-peak jitter of an input clock. Specify this value by using the INPUT_JITTER keyword in a PERIOD constraint.

Use System Jitter to specify jitter caused by design conditions (toggling rate of flip-flops, I/Os, etc.) as well as board-level conditions (VCC/GND noise, outside jitter, etc.). Specify this value by adding "SYSTEM_JITTER = <value> ns; --value is in nanoseconds" to the UCF file:

DCM Jitter and Phase Error values are automatically added by the tool.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_4/cgd.pdf

The following equation shows how clock uncertainty is calculated with DCM jitter and phase error:

Clock Uncertainty = [((System Jitter^2) + (Input Jitter^2)) ^ (1/2) + DCM Jitter] / 2 + DCM Phase Error

Use Input Jitter to specify random, peak-to-peak jitter of an input clock. Specify this value by using the INPUT_JITTER keyword in a PERIOD constraint.

Use System Jitter to specify jitter caused by design conditions (toggling rate of flip-flops, I/Os, etc.) as well as board-level conditions (VCC/GND noise, outside jitter, etc.). Specify this value by adding "SYSTEM_JITTER = <value> ns; --value is in nanoseconds" to the UCF file:

DCM Jitter and Phase Error values are automatically added by the tool.

AR# 23710
Date 12/15/2012
Status Active
Type General Article
Tools
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