The PCI Express PIPE core is provided as an NGC file which is black-boxed during synthesis. The synthesis script, xst.scr, that comes with the core targets a XC3S2000-FG900-5. However, it has been found that sometimes when this part is changed during synthesis with XST, it causes implementation to fail timing. But if the targeted part for synthesis remains XC3S2000-FG900-5 and the part is changed during implementation either through the UCF file or the "-p" option, then timing passes.
For example, if this part is changed to a XC3S500E-CP132-4 in the "xst.scr" file, then timing fails during implementation. However, if the part in the "xst.scr" file remains a XC3S2000-FG900-5, then if during implementation the part is changed to a XC3S500E-CP132-4, timing passes.
Currently, to work around this issue, keep the part in the "xst.scr" file to be a XC3S2000-FG900-5. Then, during implementation, override the part used in synthesis either by using the "CONFIG PART" constraint in the UCF file or the "-p"option during NGDBuild.