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AR# 23834

8.2i EDK - I have revved up a project from 7.1 to 8.2; now my BRAM PORTB interface no longer interfaces correctly to my logic

Description

I have revved up a project from EDK 7.1 up to EDK 8.2 in which I use port B of a BRAM block to connect to my own user logic core.

I was able to connect a BRAM PortB to logic by using the BUS_INTERFACE command in the MPD file by assigning a common name in both the bram_block and the logic to the bus interface.

e.g.:

My BRAM block has the following connections specified in the MHS file:

BUS_INTERFACE PORTB = conn_1

Also my user logic core has the following connection specified in the MHS:

BUS_INTERFACE PORTB = conn_1

However, this no longer works once I rev up my design to either 8.1i or 8.2i in that my own logic core does not interface correctly to the BRAM block.

I also get the following type of warning when revving up my system:

Instance bram_block bus interface PORTB connection conn_1 only referenced once - select another bus connection or "No Connection."

Solution

This results from changes in the syntax of the MPD file for the BRAM bus interface.

In EDK 7.1, the BRAM block interface was defined as follows in the MPD:

## Bus Interface

BUS_INTERFACE BUS = PORTA, BUS_STD = TRANSPARENT, BUS_TYPE = UNDEF

BUS_INTERFACE BUS = PORTB, BUS_STD = TRANSPARENT, BUS_TYPE = UNDEF

However, in EDK 8.1 and EDK 8.2 it is defined as follows:

## Bus Interfaces

BUS_INTERFACE BUS = PORTA, BUS_STD = XIL_BRAM, BUS_TYPE = TARGET (or INITIATOR)

BUS_INTERFACE BUS = PORTB, BUS_STD = XIL_BRAM, BUS_TYPE = TARGET (or INITIATOR)

If the rev up tool does not make these changes for the interface from PORTB BRAM to custom logic, this will result in the interface not functioning as expected.

You must, therefore, change BUS_STD and BUS_TYPE to XIL_BRAM and TARGET (or INITIATOR) respectively.

AR# 23834
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article