8.2i Virtex-5 MAP - Write address line of RAM128X1D incorrectly optimized when SPO is unused
Description
Keywords: RAM128X1D, SPO, trimmed, optimized, removed, unused
I have instantiated a RAM128X1D distributed RAM primitive and targeted it to a Virtex-5 device. The SPO output is marked as being OPEN in the VHDL, meaning that I do not want to use the output. I want to write into the top of the RAM and read out of the bottom of the RAM. The optimization that occurs due to the unused SPO incorrectly removes the 7th address line so that you can read from all 128 locations, but only write to 64 locations.
Solution
This problem has been fixed in the latest 8.2i Service Pack available at:http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 8.2i Service Pack 3.