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AR# 24005

LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII and Virtex-4 Embedded Tri-Mode Ethernet MAC Users Guides - Auto-Negotiation Pause bits swapped in documentation

Description

In UG155 for the Ethernet 1000BASE-X PCS/PMA or SGMII LogiCORE and in UG074 for the Virtex-4 Embedded Tri-Mode Ethernet MAC the bits for asymmetric or symmetric pause are swapped. Auto-Negotiation Advertisement Register (Register 4) bits 4.8:7 and Auto-Negotiation Link Partner Ability Base Register (Register 5) bits 5.8:7 are documented as follows:

00 = No PAUSE

01 = Asymmetric PAUSE towards link partner

10 = Symmetric PAUSE

11 = Both Symmetric PAUSE and Asymmetric PAUSE towards link partner

Solution

The documentation should match the IEEE specification 802.3 and state:

00 = No PAUSE

01 = Symmetric PAUSE

10 = Asymmetric PAUSE towards link partner

11 = Both Symmetric PAUSE and Asymmetric PAUSE towards link partner

The documentation is being updated.

AR# 24005
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article